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Recent questions tagged assembly
0
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1
answer
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assembly - Does a function with instructions before the entry-point label cause problems for anything (linking)?
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
960
views
assembly - Why in NASM do we have to use square brackets ([ ]) to MOV to memory location?
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
871
views
assembly - What's the real meaning of $$ in nasm
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Oct 17, 2021
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Technique[技术]
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assembly
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1.0k
views
assembly - Why don't x86 16-bit addressing modes have a scale factor, while the 32-bit version has it?
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
747
views
assembly - Why does my data section appear twice in the compiled binary? Ubuntu, x86, nasm, gdb, reaelf
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
813
views
assembly - Why "DIV EDX" in MASM always generates processor exception?
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Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
899
views
assembly - How do GNU assembler x86 instruction suffixes like ".s" in "mov.s" work?
asked
Oct 17, 2021
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Technique[技术]
by
深蓝
(
71.8m
points)
assembly
0
votes
1
answer
683
views
assembly - Cannot call real mode C function from bootloader (NASM + GCC toolchain)
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
715
views
assembly - Hard to debug SEGV due to skipped cmov from out-of-bounds memory
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
points)
assembly
0
votes
1
answer
868
views
assembly - What comes after QWORD?
asked
Oct 17, 2021
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Technique[技术]
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71.8m
points)
assembly
0
votes
1
answer
654
views
assembly - What is the significance of operations on the register EAX having their own opcodes?
asked
Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
713
views
assembly - Should pointer comparisons be signed or unsigned in 64-bit x86?
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
785
views
assembly - Embed assembler to manipulate 64-bit registers in portable C++
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Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
945
views
assembly - On x64 Linux, what is the difference between syscall, int 0x80 and ret to exit a program?
asked
Oct 17, 2021
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Technique[技术]
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71.8m
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assembly
0
votes
1
answer
977
views
assembly - Detail about MSR_GS_BASE in linux x86 64
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
889
views
assembly - Encoding ADC EAX, ECX - 2 different ways to encode? (arch x86)
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
points)
assembly
0
votes
1
answer
709
views
assembly - What's the easiest way to determine if a register's value is equal to zero or not?
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
876
views
assembly - I don't understand how to use Interrupt 21, AH=0ah
asked
Oct 17, 2021
in
Technique[技术]
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深蓝
(
71.8m
points)
assembly
0
votes
1
answer
751
views
assembly - What is the ".s" suffix in x86 instructions?
asked
Oct 17, 2021
in
Technique[技术]
by
深蓝
(
71.8m
points)
assembly
0
votes
1
answer
844
views
assembly - Are ARM instructuons SWI and SVC exactly same thing?
asked
Oct 17, 2021
in
Technique[技术]
by
深蓝
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71.8m
points)
assembly
0
votes
1
answer
751
views
assembly - How to store a two-register mul result into memory
asked
Oct 17, 2021
in
Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
688
views
assembly - Does a memory barrier acts both as a marker and as an instruction?
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
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assembly
0
votes
1
answer
896
views
assembly - Reverse byte order of EAX register
asked
Oct 17, 2021
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Technique[技术]
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深蓝
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71.8m
points)
assembly
0
votes
1
answer
1.3k
views
assembly - Convert string to int. x86 32 bit Assembler using Nasm
asked
Oct 17, 2021
in
Technique[技术]
by
深蓝
(
71.8m
points)
assembly
0
votes
1
answer
749
views
assembly - Why do x86 jump/call instructions use relative displacements instead of absolute destinations?
asked
Oct 17, 2021
in
Technique[技术]
by
深蓝
(
71.8m
points)
assembly
0
votes
1
answer
1.2k
views
assembly - Cannot move 8 bit address to 16 bit register
asked
Oct 17, 2021
in
Technique[技术]
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深蓝
(
71.8m
points)
assembly
0
votes
1
answer
718
views
assembly - What is the compatible subset of Intel's and AMD's x86-64 implementations?
asked
Oct 17, 2021
in
Technique[技术]
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71.8m
points)
assembly
0
votes
1
answer
688
views
assembly - Does Skylake need vzeroupper for turbo clocks to recover after a 512-bit instruction that only reads a ZMM register, writing a k mask?
asked
Oct 17, 2021
in
Technique[技术]
by
深蓝
(
71.8m
points)
assembly
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